diff options
| author |   Stephen Douthit <stephend@silicom-usa.com> | 2019-08-09 14:18:02 +0000 |
|---|---|---|
| committer |   Tony Luck <tony.luck@intel.com> | 2019-08-09 10:19:07 -0700 |
| commit | 29a3388bfcce7a6d087051376ea02bf8326a957b (patch) | |
| tree | 2ea8c3ed2964db077bb3894731e3e9e987b3c403 /drivers/edac/pnd2_edac.c | |
| parent | EDAC, mellanox: Add ECC support for BlueField DDR4 (diff) | |
| download | linux-dev-29a3388bfcce7a6d087051376ea02bf8326a957b.tar.xz linux-dev-29a3388bfcce7a6d087051376ea02bf8326a957b.zip | |
EDAC, pnd2: Fix ioremap() size in dnv_rd_reg()
Depending on how BIOS has marked the reserved region containing the 32KB
MCHBAR you can get warnings like:
resource sanity check: requesting [mem 0xfed10000-0xfed1ffff], which spans more than reserved [mem 0xfed10000-0xfed17fff]
caller dnv_rd_reg+0xc8/0x240 [pnd2_edac] mapping multiple BARs
Not all of the mmio regions used in dnv_rd_reg() are the same size. The
MCHBAR window is 32KB and the sideband ports are 64KB. Pass the correct
size to ioremap() depending on which resource we're reading from.
Signed-off-by: Stephen Douthit <stephend@silicom-usa.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'drivers/edac/pnd2_edac.c')
| -rw-r--r-- | drivers/edac/pnd2_edac.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/edac/pnd2_edac.c b/drivers/edac/pnd2_edac.c index ca25f8fe57ef..1ad538baaa4a 100644 --- a/drivers/edac/pnd2_edac.c +++ b/drivers/edac/pnd2_edac.c @@ -260,11 +260,14 @@ static u64 get_sideband_reg_base_addr(void) } } +#define DNV_MCHBAR_SIZE 0x8000 +#define DNV_SB_PORT_SIZE 0x10000 static int dnv_rd_reg(int port, int off, int op, void *data, size_t sz, char *name) { struct pci_dev *pdev; char *base; u64 addr; + unsigned long size; if (op == 4) { pdev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x1980, NULL); @@ -279,15 +282,17 @@ static int dnv_rd_reg(int port, int off, int op, void *data, size_t sz, char *na addr = get_mem_ctrl_hub_base_addr(); if (!addr) return -ENODEV; + size = DNV_MCHBAR_SIZE; } else { /* MMIO via sideband register base address */ addr = get_sideband_reg_base_addr(); if (!addr) return -ENODEV; addr += (port << 16); + size = DNV_SB_PORT_SIZE; } - base = ioremap((resource_size_t)addr, 0x10000); + base = ioremap((resource_size_t)addr, size); if (!base) return -ENODEV; |