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| author |   Etienne Carriere <etienne.carriere@linaro.org> | 2020-10-08 16:37:22 +0200 |
|---|---|---|
| committer |   Sudeep Holla <sudeep.holla@arm.com> | 2020-10-12 14:05:12 +0100 |
| commit | 45b9e04d5ba0b043783dfe2b19bb728e712cb32e (patch) | |
| tree | 217f26094ee1cc198da53d561f49e3bee1edad90 /drivers/firmware | |
| parent | firmware: arm_scmi: Enable building as a single module (diff) | |
| download | linux-dev-45b9e04d5ba0b043783dfe2b19bb728e712cb32e.tar.xz linux-dev-45b9e04d5ba0b043783dfe2b19bb728e712cb32e.zip | |
firmware: arm_scmi: Fix ARCH_COLD_RESET
The defination for ARCH_COLD_RESET is wrong. Let us fix it according to
the SCMI specification.
Link: https://lore.kernel.org/r/20201008143722.21888-5-etienne.carriere@linaro.org
Fixes: 95a15d80aa0d ("firmware: arm_scmi: Add RESET protocol in SCMI v2.0")
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Diffstat (limited to 'drivers/firmware')
| -rw-r--r-- | drivers/firmware/arm_scmi/reset.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/firmware/arm_scmi/reset.c b/drivers/firmware/arm_scmi/reset.c index f063cfe17e02..a981a22cfe89 100644 --- a/drivers/firmware/arm_scmi/reset.c +++ b/drivers/firmware/arm_scmi/reset.c @@ -36,9 +36,7 @@ struct scmi_msg_reset_domain_reset { #define EXPLICIT_RESET_ASSERT BIT(1) #define ASYNCHRONOUS_RESET BIT(2) __le32 reset_state; -#define ARCH_RESET_TYPE BIT(31) -#define COLD_RESET_STATE BIT(0) -#define ARCH_COLD_RESET (ARCH_RESET_TYPE | COLD_RESET_STATE) +#define ARCH_COLD_RESET 0 }; struct scmi_msg_reset_notify { |