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authorDmitry Torokhov <dmitry.torokhov@gmail.com>2019-07-20 07:07:56 +0300
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2019-07-20 07:07:56 +0300
commitc39f2d9db0fd81ea20bb5cce9b3f082ca63753e2 (patch)
tree8e80ed5601b4fb8880a2ca8e08802bc8b1f850bd /drivers/fpga/Makefile
parentMerge branch 'next' into for-linus (diff)
parentInput: alps - fix a mismatch between a condition check and its comment (diff)
downloadlinux-dev-c39f2d9db0fd81ea20bb5cce9b3f082ca63753e2.tar.xz
linux-dev-c39f2d9db0fd81ea20bb5cce9b3f082ca63753e2.zip
Merge branch 'next' into for-linus
Prepare second round of input updates for 5.3 merge window.
Diffstat (limited to 'drivers/fpga/Makefile')
-rw-r--r--drivers/fpga/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index c0dd4c82fbdb..312b9371742f 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC) += stratix10-soc.o
obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o
obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o
+obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o
obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o