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authorLinus Walleij <linus.walleij@linaro.org>2016-02-11 11:03:06 +0100
committerLinus Walleij <linus.walleij@linaro.org>2016-02-16 00:20:02 +0100
commit20ec3e39fc12cf3a331ee73eb01d52bddcdd2fa4 (patch)
tree4eabd98c542ad5c4a5f221544d25f44e98d41dc2 /drivers/gpio/gpiolib.h
parentpinctrl: sirf/atlas7: stop poking around in GPIO internals (diff)
downloadlinux-dev-20ec3e39fc12cf3a331ee73eb01d52bddcdd2fa4.tar.xz
linux-dev-20ec3e39fc12cf3a331ee73eb01d52bddcdd2fa4.zip
gpio: move the pin ranges into gpio_device
Instead of keeping this reference to the pin ranges in the client driver-supplied gpio_chip, move it to the internal gpio_device as the drivers have no need to inspect this. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpiolib.h')
-rw-r--r--drivers/gpio/gpiolib.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h
index d154984c71d9..5a36908fd39d 100644
--- a/drivers/gpio/gpiolib.h
+++ b/drivers/gpio/gpiolib.h
@@ -55,6 +55,16 @@ struct gpio_device {
int base;
u16 ngpio;
struct list_head list;
+
+#ifdef CONFIG_PINCTRL
+ /*
+ * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
+ * describe the actual pin range which they serve in an SoC. This
+ * information would be used by pinctrl subsystem to configure
+ * corresponding pins for gpio usage.
+ */
+ struct list_head pin_ranges;
+#endif
};
/**