diff options
| author |   Yang Wang <KevinYang.Wang@amd.com> | 2022-09-09 11:06:50 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-09-13 12:56:16 -0400 |
| commit | cd3a49af58c23dd5ffa1d4d5a120ee2354d2e8d8 (patch) | |
| tree | 88c4ee7019cc15b86adaa54063d806c6265959c9 /drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | |
| parent | drm/amdgpu: Enable full reset when RAS is supported on gc v11_0_0 (diff) | |
| download | linux-dev-cd3a49af58c23dd5ffa1d4d5a120ee2354d2e8d8.tar.xz linux-dev-cd3a49af58c23dd5ffa1d4d5a120ee2354d2e8d8.zip | |
drm/amdgpu: change the alignment size of TMR BO to 1M
align TMR BO size TO tmr size is not necessary,
modify the size to 1M to avoid re-create BO fail
when serious VRAM fragmentation.
v2:
add new macro PSP_TMR_ALIGNMENT for TMR BO alignment size
Signed-off-by: Yang Wang <KevinYang.Wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index cfcaf890a6a1..e430a3142310 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -766,7 +766,7 @@ static int psp_tmr_init(struct psp_context *psp) } pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; - ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_SIZE(psp->adev), + ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_ALIGNMENT, AMDGPU_GEM_DOMAIN_VRAM, &psp->tmr_bo, &psp->tmr_mc_addr, pptr); |