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authorChristian König <christian.koenig@amd.com>2022-06-03 15:05:04 +0200
committerAlex Deucher <alexander.deucher@amd.com>2022-06-08 11:44:25 -0400
commit64f6516e60b0bbe6abfc9f1d9f1999012e0f11a6 (patch)
tree8c8b59c9340428b5ca12dcee6e6c744bedc0f4f2 /drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
parentdrm/amdgpu: fix limiting AV1 to the first instance on VCN3 (diff)
downloadlinux-dev-64f6516e60b0bbe6abfc9f1d9f1999012e0f11a6.tar.xz
linux-dev-64f6516e60b0bbe6abfc9f1d9f1999012e0f11a6.zip
drm/amdgpu: always flush the TLB on gfx8
The TLB on GFX8 stores each block of 8 PTEs where any of the valid bits are set. Fixes: 5255e146c99a ("drm/amdgpu: rework TLB flushing") Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Tested-by: Michal Kubecek <mkubecek@suse.cz> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 109d8dd71c11..dc76d2b3ce52 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -793,6 +793,11 @@ int amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm,
flush_tlb |= adev->gmc.xgmi.num_physical_nodes &&
adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 0);
+ /*
+ * On GFX8 and older any 8 PTE block with a valid bit set enters the TLB
+ */
+ flush_tlb |= adev->ip_versions[GC_HWIP][0] < IP_VERSION(9, 0, 0);
+
memset(&params, 0, sizeof(params));
params.adev = adev;
params.vm = vm;