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| author |   Rex Zhu <Rex.Zhu@amd.com> | 2016-11-11 11:18:07 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2016-11-23 15:08:39 -0500 |
| commit | b02d4081a5260778ec9d20ac1f079c2b503d9943 (patch) | |
| tree | e218336ddad103867d827635c8f7b0bfee576a00 /drivers/gpu/drm/amd/amdgpu/cz_dpm.c | |
| parent | drm/amdgpu: change log level to KERN_INFO in ci_dpm.c (diff) | |
| download | linux-dev-b02d4081a5260778ec9d20ac1f079c2b503d9943.tar.xz linux-dev-b02d4081a5260778ec9d20ac1f079c2b503d9943.zip | |
drm/amdgpu: refine cz uvd clock gate logic.
sw clockgate was used on uvd6.0.
when uvd is idle, we gate the uvd clock.
when decode, we ungate the uvd clock.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/cz_dpm.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c index 41fa351aa241..ba2b66be9022 100644 --- a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c +++ b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c @@ -2111,9 +2111,8 @@ static void cz_dpm_powergate_uvd(struct amdgpu_device *adev, bool gate) if (gate) { if (pi->caps_uvd_pg) { - /* disable clockgating so we can properly shut down the block */ ret = amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_UVD, - AMD_CG_STATE_UNGATE); + AMD_CG_STATE_GATE); if (ret) { DRM_ERROR("UVD DPM Power Gating failed to set clockgating state\n"); return; @@ -2159,9 +2158,8 @@ static void cz_dpm_powergate_uvd(struct amdgpu_device *adev, bool gate) return; } - /* enable clockgating. hw will dynamically gate/ungate clocks on the fly */ ret = amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_UVD, - AMD_CG_STATE_GATE); + AMD_CG_STATE_UNGATE); if (ret) { DRM_ERROR("UVD DPM Power Gating Failed to set clockgating state\n"); return; |