diff options
author | Martin Leung <martin.leung@amd.com> | 2020-01-30 18:54:44 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2020-02-11 11:50:42 -0500 |
commit | a760fc1bff03f24485324b9ee0c95a45a8cbc5c8 (patch) | |
tree | 4e16d4d643964228edec8feb9ba6eac3ed2de1a8 /drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c | |
parent | drm/amd/display: add odm split logic to scaling calculations (diff) | |
download | linux-dev-a760fc1bff03f24485324b9ee0c95a45a8cbc5c8.tar.xz linux-dev-a760fc1bff03f24485324b9ee0c95a45a8cbc5c8.zip |
drm/amd/display: add monitor patch to disable SCDC read/write
[why]
customer issue: found that for their specific panel, EDID register space
being overwritten during SCDC read write
[how]
customer accepted HDMI 2 features not working - disabled SCDC read/write
as well as HDMI 2 in general based on monitor patch
Signed-off-by: Martin Leung <martin.leung@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c index a49c10d5df26..a5586f68b4da 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c @@ -686,6 +686,10 @@ void dal_ddc_service_write_scdc_data(struct ddc_service *ddc_service, uint8_t write_buffer[2] = {0}; /*Lower than 340 Scramble bit from SCDC caps*/ + if (ddc_service->link->local_sink && + ddc_service->link->local_sink->edid_caps.panel_patch.skip_scdc_overwrite) + return; + dal_ddc_service_query_ddc_data(ddc_service, slave_address, &offset, sizeof(offset), &sink_version, sizeof(sink_version)); if (sink_version == 1) { @@ -715,6 +719,10 @@ void dal_ddc_service_read_scdc_data(struct ddc_service *ddc_service) uint8_t offset = HDMI_SCDC_TMDS_CONFIG; uint8_t tmds_config = 0; + if (ddc_service->link->local_sink && + ddc_service->link->local_sink->edid_caps.panel_patch.skip_scdc_overwrite) + return; + dal_ddc_service_query_ddc_data(ddc_service, slave_address, &offset, sizeof(offset), &tmds_config, sizeof(tmds_config)); if (tmds_config & 0x1) { |