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authorJun Lei <jun.lei@amd.com>2020-12-16 12:56:38 -0500
committerAlex Deucher <alexander.deucher@amd.com>2021-03-23 23:32:27 -0400
commit86ca3cbe5c9ca8e7d47424c98fc7b49b34b67d96 (patch)
tree20ba7e2020444f93b034a6facc8510e049fa9596 /drivers/gpu/drm/amd/display/dc/dc_hw_types.h
parentdrm/amd/display: Bypass sink detect when there are no eDPs connected (diff)
downloadlinux-dev-86ca3cbe5c9ca8e7d47424c98fc7b49b34b67d96.tar.xz
linux-dev-86ca3cbe5c9ca8e7d47424c98fc7b49b34b67d96.zip
drm/amd/display: Increase precision for bpp in DSC calculations
[Why?] Many DSC variables and related functions use whole bits for bpp. [How?] Change variables and related functions to use 16ths of a bit for bpp. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Jun Lei <jun.lei@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Solomon Chiu <solomon.chiu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_hw_types.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc_hw_types.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
index 48d3ed97ead9..bcec019efa6f 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h
@@ -770,6 +770,7 @@ struct dc_crtc_timing {
#endif
struct dc_crtc_timing_flags flags;
+ uint32_t dsc_fixed_bits_per_pixel_x16; /* DSC target bitrate in 1/16 of bpp (e.g. 128 -> 8bpp) */
struct dc_dsc_config dsc_cfg;
};