diff options
| author |   Josip Pavic <Josip.Pavic@amd.com> | 2022-04-28 17:01:33 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-05-10 17:53:12 -0400 |
| commit | 86edfc0db6438a4e1e8e51b3f67b4e2ddefbd735 (patch) | |
| tree | 5a3c257bc6611fc8ee50dcee84fb64da3ddb6fe7 /drivers/gpu/drm/amd/display/dc/dc_hw_types.h | |
| parent | drm/amd/display: Reset cached PSR parameters after hibernate (diff) | |
| download | linux-dev-86edfc0db6438a4e1e8e51b3f67b4e2ddefbd735.tar.xz linux-dev-86edfc0db6438a4e1e8e51b3f67b4e2ddefbd735.zip | |
drm/amd/display: move definition of dc_flip_addrs struct
[Why & How]
Move definition of dc_flip_addrs struct from dc.h to dc_hw_types.h to
prevent build errors
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_hw_types.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h index 0c754cb0459e..aa7e3a07191d 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h @@ -236,6 +236,22 @@ enum pixel_format { PIXEL_FORMAT_UNKNOWN }; +/* + * This structure holds a surface address. There could be multiple addresses + * in cases such as Stereo 3D, Planar YUV, etc. Other per-flip attributes such + * as frame durations and DCC format can also be set. + */ +#define DC_MAX_DIRTY_RECTS 3 +struct dc_flip_addrs { + struct dc_plane_address address; + unsigned int flip_timestamp_in_us; + bool flip_immediate; + /* TODO: add flip duration for FreeSync */ + bool triplebuffer_flips; + unsigned int dirty_rect_count; + struct rect dirty_rects[DC_MAX_DIRTY_RECTS]; +}; + enum tile_split_values { DC_DISPLAY_MICRO_TILING = 0x0, DC_THIN_MICRO_TILING = 0x1, |