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author | SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com> | 2018-09-10 18:59:42 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2019-03-19 15:36:49 -0500 |
commit | 5d87a3fdceecd207a41213c0a94a7218c0ea6ce3 (patch) | |
tree | f240e0e704fc59baa6226817533b1ae0ce57cfaf /drivers/gpu/drm/amd/display/dc/dc_types.h | |
parent | drm/amd/display: Refactor reg_set and reg_update. (diff) | |
download | linux-dev-5d87a3fdceecd207a41213c0a94a7218c0ea6ce3.tar.xz linux-dev-5d87a3fdceecd207a41213c0a94a7218c0ea6ce3.zip |
drm/amd/display: Add PSR SMU Interrupt support
[WHY]
We have new bios capabilities enabling s0i2 entry on SMU interrupt. We want
this interrupt to be fired on PSR transitions such that we enter s0i2
when entering PSR active.
[HOW]
Add code to send the SMU interrupt with the appropriate
staticscreen flag when entering and exting PSR. Protect this
code with a config flag since it currently impacts BL PWM.
Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_types.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_types.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h index da2009a108cf..00be40a3dde3 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_types.h @@ -550,9 +550,9 @@ struct psr_config { unsigned char psr_version; unsigned int psr_rfb_setup_time; bool psr_exit_link_training_required; - bool psr_frame_capture_indication_req; unsigned int psr_sdp_transmit_line_num_deadline; + bool allow_smu_optimizations; }; union dmcu_psr_level { @@ -654,6 +654,7 @@ struct psr_context { * continuing powerd own */ unsigned int frame_delay; + bool allow_smu_optimizations; }; struct colorspace_transform { |