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authorJun Lei <Jun.Lei@amd.com>2019-04-08 15:27:53 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-04-23 17:28:19 -0500
commita9a3c0da1427153e74a4ad97b1a897384a6b0404 (patch)
tree1d847d9ddd02f904ca1a963473f49ecf97157b39 /drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
parentdrm/amd/display: Allow cursor position when plane_res.ipp is NULL (diff)
downloadlinux-dev-a9a3c0da1427153e74a4ad97b1a897384a6b0404.tar.xz
linux-dev-a9a3c0da1427153e74a4ad97b1a897384a6b0404.zip
drm/amd/display: add explicit handshake between x86 and DMCU
[why] When DMCU interrupts x86, it leads to undefined phy programming [how] expand dmcu interface to support new PHY lock and unlock commands if DMCU FW doesn't support these commands, they fail silently so its okay Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
index 9ad7c543cc4c..818536eea00a 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
@@ -51,6 +51,8 @@
#define PSR_SET_WAITLOOP 0x31
#define MCP_INIT_DMCU 0x88
#define MCP_INIT_IRAM 0x89
+#define MCP_SYNC_PHY_LOCK 0x90
+#define MCP_SYNC_PHY_UNLOCK 0x91
#define MCP_BL_SET_PWM_FRAC 0x6A /* Enable or disable Fractional PWM */
#define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT_MASK 0x00000001L
@@ -719,7 +721,7 @@ static bool dcn10_is_dmcu_initialized(struct dmcu *dmcu)
return true;
}
-#endif
+#endif //(CONFIG_DRM_AMD_DC_DCN1_0)
static const struct dmcu_funcs dce_funcs = {
.dmcu_init = dce_dmcu_init,