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| author |   Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> | 2017-07-07 17:21:45 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 18:15:11 -0400 |
| commit | b02c3b055fe27cb37969c68cd81db767a16af43b (patch) | |
| tree | bdd5fbb10c6f4cb72b4b285e953b4baf20a05fa5 /drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | |
| parent | drm/amd/display: add line number to reg_wait timeout print (diff) | |
| download | linux-dev-b02c3b055fe27cb37969c68cd81db767a16af43b.tar.xz linux-dev-b02c3b055fe27cb37969c68cd81db767a16af43b.zip | |
drm/amd/display: hwseq init sequence update
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h index 4da9142351fa..7e1d46fdcc76 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h @@ -216,6 +216,11 @@ struct dce_hwseq_registers { uint32_t DCCG_GATE_DISABLE_CNTL; uint32_t DCCG_GATE_DISABLE_CNTL2; uint32_t DCFCLK_CNTL; + uint32_t MICROSECOND_TIME_BASE_DIV; + uint32_t MILLISECOND_TIME_BASE_DIV; + uint32_t DISPCLK_FREQ_CHANGE_CNTL; + uint32_t RBBMIF_TIMEOUT_DIS; + uint32_t RBBMIF_TIMEOUT_DIS_2; #endif }; /* set field name */ @@ -378,7 +383,8 @@ struct dce_hwseq_registers { type DOMAIN5_PGFSM_PWR_STATUS; \ type DOMAIN6_PGFSM_PWR_STATUS; \ type DOMAIN7_PGFSM_PWR_STATUS; \ - type DCFCLK_GATE_DIS; + type DCFCLK_GATE_DIS; \ + type DCHUBBUB_GLOBAL_TIMER_REFDIV; #endif struct dce_hwseq_shift { |