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| author |   Yongqiang Sun <yongqiang.sun@amd.com> | 2018-01-05 13:53:06 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2018-02-19 14:18:36 -0500 |
| commit | 3be1406a72b08e3122660f7ea2a41a129fe5e266 (patch) | |
| tree | 771cd1be995d2d92355b8a8a6a3ee881168d760f /drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c | |
| parent | drm/amd/display: Synchronize update plane addr for freesync (diff) | |
| download | linux-dev-3be1406a72b08e3122660f7ea2a41a129fe5e266.tar.xz linux-dev-3be1406a72b08e3122660f7ea2a41a129fe5e266.zip | |
drm/amd/display: Add timing generator count to resource pool.
Use tg count in resource pool for further reference.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c index 442dd2d93618..3bdbed80f7f8 100644 --- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c @@ -849,6 +849,7 @@ static bool construct( *************************************************/ pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE; pool->base.pipe_count = res_cap.num_timing_generator; + pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator; dc->caps.max_downscale_ratio = 200; dc->caps.i2c_speed_in_khz = 40; dc->caps.max_cursor_size = 128; |