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authorHarry Wentland <harry.wentland@amd.com>2017-12-19 16:17:22 -0500
committerAlex Deucher <alexander.deucher@amd.com>2018-02-19 14:17:26 -0500
commit7e98ab103521f82957f3c2d82d555a6803360440 (patch)
tree3fa4a12eb88edf0a9fc5ed1c0a878baed9de0582 /drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
parentdrm/amd/display: Debug print when validate_stream fails (diff)
downloadlinux-dev-7e98ab103521f82957f3c2d82d555a6803360440.tar.xz
linux-dev-7e98ab103521f82957f3c2d82d555a6803360440.zip
drm/amd/display: Don't allow dual-link DVI on all ASICs.
Our APUs (Carrizo, Stoney, Raven) don't support it. v2: Don't use is_apu as other ASICs might also not support it Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
index 3ea43e2a9450..442dd2d93618 100644
--- a/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
@@ -852,6 +852,7 @@ static bool construct(
dc->caps.max_downscale_ratio = 200;
dc->caps.i2c_speed_in_khz = 40;
dc->caps.max_cursor_size = 128;
+ dc->caps.dual_link_dvi = true;
for (i = 0; i < pool->base.pipe_count; i++) {
pool->base.timing_generators[i] =