diff options
| author |   Bayan Zabihiyan <bayan.zabihiyan@amd.com> | 2019-08-08 11:08:52 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-08-23 11:43:42 -0500 |
| commit | 470e2ca569bf780f832e3020ceb5afdef16a9084 (patch) | |
| tree | 9eefb4660f14271ee2c76f94e02f3e98a36339f3 /drivers/gpu/drm/amd/display/dc/dce110 | |
| parent | drm/amd/display: fix DML not calculating delivery time (diff) | |
| download | linux-dev-470e2ca569bf780f832e3020ceb5afdef16a9084.tar.xz linux-dev-470e2ca569bf780f832e3020ceb5afdef16a9084.zip | |
drm/amd/display: Expose OTG_V_TOTAL_MID for HW Diags
[Why]
Existing HW Features, HW Diags test requested that the
registers be exposed.
[How]
Add V_TOTAL_MID to existing DC structures.
Make sure values are passed down throughout DC
Add Register definition.
Program the additional registers
Add additional Logic for V_TOTAL_CONTROL.
Signed-off-by: Bayan Zabihiyan <bayan.zabihiyan@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce110')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index d2d887972956..01a924bf477a 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c @@ -1719,7 +1719,8 @@ void dce110_set_safe_displaymarks( ******************************************************************************/ static void set_drr(struct pipe_ctx **pipe_ctx, - int num_pipes, int vmin, int vmax) + int num_pipes, unsigned int vmin, unsigned int vmax, + unsigned int vmid, unsigned int vmid_frame_number) { int i = 0; struct drr_params params = {0}; |