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authorEric Bernstein <eric.bernstein@amd.com>2018-08-17 17:57:44 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-03-20 23:39:48 -0500
commitae5041f3a03134a4cd5fc1c41e082c0e5d290392 (patch)
tree9fea4c15fe52cc1203cd6d6a240afee0608815c5 /drivers/gpu/drm/amd/display/dc/dce110
parentdrm/amd/display: Move dm_read_reg_func to dc_helper. (diff)
downloadlinux-dev-ae5041f3a03134a4cd5fc1c41e082c0e5d290392.tar.xz
linux-dev-ae5041f3a03134a4cd5fc1c41e082c0e5d290392.zip
drm/amd/display: Fix setting DP_VID_N_MUL
[Why] Need to set VID_N_MUL for 4:2:0 cases [How] Move setting to enc1_stream_encoder_dp_unblank and ensure it is also set for non-4:2:0 cases. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce110')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index 89f575f0cd65..7ec9958ddd26 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1054,6 +1054,7 @@ void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
/* only 3 items below are used by unblank */
params.pixel_clk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10;
params.link_settings.link_rate = link_settings->link_rate;
+ params.pixel_encoding = pipe_ctx->stream->timing.pixel_encoding;
if (dc_is_dp_signal(pipe_ctx->stream->signal))
pipe_ctx->stream_res.stream_enc->funcs->dp_unblank(pipe_ctx->stream_res.stream_enc, &params);