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| author |   Eric Yang <Eric.Yang2@amd.com> | 2018-09-14 15:55:01 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2018-10-09 17:02:15 -0500 |
| commit | e15fc81f11854451ec8a8ed9168b8247e4e9a10b (patch) | |
| tree | 9207686487492e9bd5d8b69ab1607ce7ed2ac24f /drivers/gpu/drm/amd/display/dc/dce120 | |
| parent | drm/amd/display: block DP YCbCr420 modes (diff) | |
| download | linux-dev-e15fc81f11854451ec8a8ed9168b8247e4e9a10b.tar.xz linux-dev-e15fc81f11854451ec8a8ed9168b8247e4e9a10b.zip | |
drm/amd/display: clean up encoding checks
[Why]
All ASICS we support has YCbCr support, so
the check is unnecessary, the currently logic
in validate output also returns true all
the time, so the unneccessary logic is removed
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce120')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c index 59055801af44..53a7a2f2ef76 100644 --- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c @@ -609,7 +609,6 @@ static const struct encoder_feature_support link_enc_feature = { .flags.bits.IS_HBR3_CAPABLE = true, .flags.bits.IS_TPS3_CAPABLE = true, .flags.bits.IS_TPS4_CAPABLE = true, - .flags.bits.IS_YCBCR_CAPABLE = true }; static struct link_encoder *dce120_link_encoder_create( |