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author | Yongqiang Sun <yongqiang.sun@amd.com> | 2018-01-05 13:53:06 -0500 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2018-02-19 14:18:36 -0500 |
commit | 3be1406a72b08e3122660f7ea2a41a129fe5e266 (patch) | |
tree | 771cd1be995d2d92355b8a8a6a3ee881168d760f /drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c | |
parent | drm/amd/display: Synchronize update plane addr for freesync (diff) | |
download | linux-dev-3be1406a72b08e3122660f7ea2a41a129fe5e266.tar.xz linux-dev-3be1406a72b08e3122660f7ea2a41a129fe5e266.zip |
drm/amd/display: Add timing generator count to resource pool.
Use tg count in resource pool for further reference.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c index 25d7eb1567ae..a36c14d3d9a8 100644 --- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c @@ -790,6 +790,7 @@ static bool dce80_construct( *************************************************/ pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE; pool->base.pipe_count = res_cap.num_timing_generator; + pool->base.timing_generator_count = res_cap.num_timing_generator; dc->caps.max_downscale_ratio = 200; dc->caps.i2c_speed_in_khz = 40; dc->caps.max_cursor_size = 128; @@ -955,6 +956,7 @@ static bool dce81_construct( *************************************************/ pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE; pool->base.pipe_count = res_cap_81.num_timing_generator; + pool->base.timing_generator_count = res_cap_81.num_timing_generator; dc->caps.max_downscale_ratio = 200; dc->caps.i2c_speed_in_khz = 40; dc->caps.max_cursor_size = 128; @@ -1120,6 +1122,7 @@ static bool dce83_construct( *************************************************/ pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE; pool->base.pipe_count = res_cap_83.num_timing_generator; + pool->base.timing_generator_count = res_cap_83.num_timing_generator; dc->caps.max_downscale_ratio = 200; dc->caps.i2c_speed_in_khz = 40; dc->caps.max_cursor_size = 128; |