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authorHarry Wentland <harry.wentland@amd.com>2017-01-23 11:49:24 -0500
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 17:11:28 -0400
commitf0e3db90a6fbee4acc921a4912a3e3460efb5cc0 (patch)
treefb1b9350ae3ba693651e63b84f8b5a91c49cd617 /drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
parentdrm/amd/display: add missing dcc update on flip call (diff)
downloadlinux-dev-f0e3db90a6fbee4acc921a4912a3e3460efb5cc0.tar.xz
linux-dev-f0e3db90a6fbee4acc921a4912a3e3460efb5cc0.zip
drm/amd/display: Don't reserve pipe for underlay on ASIC without underlay
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Jordan Lazare <Jordan.Lazare@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
index bee3a41ffe9f..fea60aa5d297 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
@@ -931,7 +931,7 @@ static bool construct(
/*************************************************
* Resource + asic cap harcoding *
*************************************************/
- pool->base.underlay_pipe_index = -1;
+ pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;
pool->base.pipe_count = res_cap.num_timing_generator;
dc->public.caps.max_downscale_ratio = 200;
dc->public.caps.i2c_speed_in_khz = 40;