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| author |   Charlene Liu <charlene.liu@amd.com> | 2019-03-01 11:12:50 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-03-20 23:39:48 -0500 |
| commit | 7fe538a4d64135d8f8e4aca8d0aedf266958025c (patch) | |
| tree | 4acc1d7a90038a20cf4b823e7e5d5b5fe2b8927d /drivers/gpu/drm/amd/display/dc/dce | |
| parent | drm/amd/display: Fix setting DP_VID_N_MUL (diff) | |
| download | linux-dev-7fe538a4d64135d8f8e4aca8d0aedf266958025c.tar.xz linux-dev-7fe538a4d64135d8f8e4aca8d0aedf266958025c.zip | |
drm/amd/display: fix DP 422 VID_M half the rate issue.
[Description]
when programming VID_TIMING, we were using the original VESA timing for DP_VIDM/N.
for YCbCr420 or compressed YCbCr422, using half rate as YCbCr444.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c index 1fa2d4fd7a35..67cad0016f96 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c @@ -977,7 +977,7 @@ static void dce110_stream_encoder_dp_unblank( uint64_t m_vid_l = n_vid; - m_vid_l *= param->pixel_clk_khz; + m_vid_l *= param->timing.pix_clk_100hz / 10; m_vid_l = div_u64(m_vid_l, param->link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ); |