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| author |   Yue Hin Lau <Yuehin.Lau@amd.com> | 2017-08-19 16:34:36 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 18:17:11 -0400 |
| commit | b3c340fad4643b7351a4777fae37e58925db04c9 (patch) | |
| tree | 69706e7736fbb2b47aa9dab0c56869728441565d /drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c | |
| parent | drm/amd/display: Update DSCL (diff) | |
| download | linux-dev-b3c340fad4643b7351a4777fae37e58925db04c9.tar.xz linux-dev-b3c340fad4643b7351a4777fae37e58925db04c9.zip | |
drm/amd/display: move cm registers from ipp to dpp_cm
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c index 33830639e210..14c3b330b27b 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c @@ -225,7 +225,7 @@ static void dpp_set_lb( DYNAMIC_PIXEL_DEPTH, dyn_pix_depth, /* Dynamic expansion pixel depth */ DITHER_EN, 0, /* Dithering enable: Disabled */ INTERLEAVE_EN, lb_params->interleave_en, /* Interleave source enable */ - ALPHA_EN, lb_params->alpha_en); /* Alpha enable */ + LB_DATA_FORMAT__ALPHA_EN, lb_params->alpha_en); /* Alpha enable */ } REG_SET_2(LB_MEMORY_CTRL, 0, @@ -716,4 +716,3 @@ void dcn10_dpp_dscl_set_scaler_manual_scale( dpp_set_scl_filter(xfm, scl_data, ycbcr); } - |