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authorJun Lei <Jun.Lei@amd.com>2019-09-25 09:46:38 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-10-25 16:50:07 -0400
commit123c53a97a5500d07bf8a4adb95032dfc70af69e (patch)
tree55c12853e502f585603b0ea2e9c5173713755231 /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h
parentdrm/amd/display: add 50us buffer as WA for pstate switch in active (diff)
downloadlinux-dev-123c53a97a5500d07bf8a4adb95032dfc70af69e.tar.xz
linux-dev-123c53a97a5500d07bf8a4adb95032dfc70af69e.zip
drm/amd/display: add odm visual confirm
[why] Hard to determine if pipe combine is done with MPC or ODM [how] Add new visual confirm type, this will mark each MPCC tree with a different color Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h
index 9dbc2effa4ea..3098f1049ed7 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h
@@ -109,5 +109,7 @@ bool dcn20_set_blend_lut(
struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
bool dcn20_set_shaper_3dlut(
struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
-
+void dcn20_get_mpctree_visual_confirm_color(
+ struct pipe_ctx *pipe_ctx,
+ struct tg_color *color);
#endif /* __DC_HWSS_DCN20_H__ */