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| author |   Wyatt Wood <wyatt.wood@amd.com> | 2021-05-06 16:11:16 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2021-05-19 22:39:36 -0400 |
| commit | 3ca402375a2197579d1029e7fa9d856847fe0e7b (patch) | |
| tree | 0123f32e6a364d35e44f8410628ebf8426ea2263 /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h | |
| parent | drm/amd/display: Use the correct max downscaling value for DCN3.x family (diff) | |
| download | linux-dev-3ca402375a2197579d1029e7fa9d856847fe0e7b.tar.xz linux-dev-3ca402375a2197579d1029e7fa9d856847fe0e7b.zip | |
drm/amd/display: Refactor and add visual confirm for HW Flip Queue
[Why]
Visual confirm will indicate if driver is programming
the surface address.
Refactor is required because much of the visual confirm
logic is buried deep in the mpcc files.
In addition, visual confirm is not updated during fast updates.
[How]
In order to have visual confirm for driver flips, visual confirm
needs to be updated on every frame, including fast updates.
Add a new hw sequencer interface update_visual_confirm_color,
and a new mpc function pointer set_bg_color.
v2: drop unused variable (Alex)
Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h index c69f766a40ce..6bba191cd33e 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.h @@ -146,5 +146,10 @@ void dcn20_set_disp_pattern_generator(const struct dc *dc, const struct tg_color *solid_color, int width, int height, int offset); +void dcn20_update_visual_confirm_color(struct dc *dc, + struct pipe_ctx *pipe_ctx, + struct tg_color *color, + int mpcc_id); + #endif /* __DC_HWSS_DCN20_H__ */ |