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authorEric Yang <Eric.Yang2@amd.com>2019-04-03 15:40:05 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-05-24 12:20:49 -0500
commit21e471f0850de874b2afa54f19ef7886490b99fe (patch)
treeeb501656f2659e903ae7f9add2a879320355ca76 /drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
parentdrm/amd/display: fix multi display seamless boot case (diff)
downloadlinux-dev-21e471f0850de874b2afa54f19ef7886490b99fe.tar.xz
linux-dev-21e471f0850de874b2afa54f19ef7886490b99fe.zip
drm/amd/display: Set dispclk and dprefclock directly
[Why] To simply logic for setting DCN specific clocks, we will send SMU message directly through the VBIOS message box. [How] Add new structure in pp_smu to hold functions to set clocks through vbios message box Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dm_pp_smu.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dm_pp_smu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h b/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
index 4fc4208d1472..9f7ebf6a4e40 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
@@ -80,6 +80,7 @@ struct pp_smu_funcs_rv {
/* PPSMC_MSG_SetDisplayCount
* 0 triggers S0i2 optimization
*/
+
void (*set_display_count)(struct pp_smu *pp, int count);
/* reader and writer WM's are sent together as part of one table*/
@@ -115,7 +116,6 @@ struct pp_smu_funcs_rv {
/* PME w/a */
void (*set_pme_wa_enable)(struct pp_smu *pp);
-
};
struct pp_smu_funcs {