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author | Tony Cheng <tony.cheng@amd.com> | 2017-01-12 23:18:33 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 17:10:07 -0400 |
commit | f84a8161cb1652281746d113667427dbbf8bd5db (patch) | |
tree | c2e40e194cfe264067f698dc0dd89d1764d88afb /drivers/gpu/drm/amd/display/dc/inc/core_status.h | |
parent | drm/amd/display: Use pflip prepare and submit parts (v2) (diff) | |
download | linux-dev-f84a8161cb1652281746d113667427dbbf8bd5db.tar.xz linux-dev-f84a8161cb1652281746d113667427dbbf8bd5db.zip |
drm/amd/display: mode change without breaking unaffected streams
- include clock constraint logic in validate
- in dc_commit_streams, include surfaces of unaffected streams
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/core_status.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/core_status.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_status.h b/drivers/gpu/drm/amd/display/dc/inc/core_status.h index 32a2cc712000..147eb7cac701 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/core_status.h +++ b/drivers/gpu/drm/amd/display/dc/inc/core_status.h @@ -40,6 +40,8 @@ enum dc_status { DC_EXCEED_DONGLE_MAX_CLK, DC_SURFACE_PIXEL_FORMAT_UNSUPPORTED, DC_FAIL_BANDWIDTH_VALIDATE, /* BW and Watermark validation */ + DC_FAIL_SCALING, + DC_FAIL_CLK_CONSTRAINT, DC_ERROR_UNEXPECTED = -1 }; |