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authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>2019-10-25 15:03:58 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-11-13 15:29:42 -0500
commit3a1627b07385a6bb497f7ca4e2ffe1e1dbc70b68 (patch)
tree03324fc68964444a70a7922a0ba03af277df1c13 /drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
parentdrm/amdgpu: Add DMCUB to firmware query interface (diff)
downloadlinux-dev-3a1627b07385a6bb497f7ca4e2ffe1e1dbc70b68.tar.xz
linux-dev-3a1627b07385a6bb497f7ca4e2ffe1e1dbc70b68.zip
drm/amd/display: Add DMUB support to DC
DC will use DMUB for command submission and flow control during initialization. Register offloading as well as submitting some BIOS commands are part of the DC internal interface but are guarded behind debug options. It won't be functional in amdgpu_dm yet since we don't pass the DMUB service to DC for use. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/reg_helper.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/reg_helper.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h b/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
index 8503d9cc4763..a9a9657c095a 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
@@ -485,4 +485,26 @@ uint32_t generic_indirect_reg_update_ex(const struct dc_context *ctx,
uint8_t shift1, uint32_t mask1, uint32_t field_value1,
...);
+
+#ifdef CONFIG_DRM_AMD_DC_DMUB
+/* register offload macros
+ *
+ * instead of MMIO to register directly, in some cases we want
+ * to gather register sequence and execute the register sequence
+ * from another thread so we optimize time required for lengthy ops
+ */
+
+/* start gathering register sequence */
+#define REG_SEQ_START() \
+ reg_sequence_start_gather(CTX)
+
+/* start execution of register sequence gathered since REG_SEQ_START */
+#define REG_SEQ_SUBMIT() \
+ reg_sequence_start_execute(CTX)
+
+/* wait for the last REG_SEQ_SUBMIT to finish */
+#define REG_SEQ_WAIT_DONE() \
+ reg_sequence_wait_done(CTX)
+#endif
+
#endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_REG_HELPER_H_ */