diff options
| author |   Yongqiang Sun <yongqiang.sun@amd.com> | 2020-03-05 13:47:26 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-03-19 00:03:04 -0400 |
| commit | eb1b4573c080469fbacce953805e22a670193344 (patch) | |
| tree | 976a8b31ee523eec6dfc699c026f655b1e9f0166 /drivers/gpu/drm/amd/display/dc/inc | |
| parent | drm/amd/display: Remove connect DIG FE to its BE during timing programming (diff) | |
| download | linux-dev-eb1b4573c080469fbacce953805e22a670193344.tar.xz linux-dev-eb1b4573c080469fbacce953805e22a670193344.zip | |
drm/amd/display: DPP DTO isn't update properly.
[Why]
before update dpp DTO, we check dppclks in context to determine it is
changed or not, but dppclks in context will be updated anyways after
flip is done, so compare dppclks in context will always get an equal
result.
[How]
Add pipe dpp clks in dccg and compare values between dccg and context.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h index 05ee5295d2c1..336c80a18175 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h @@ -27,11 +27,12 @@ #define __DAL_DCCG_H__ #include "dc_types.h" +#include "hw_shared.h" struct dccg { struct dc_context *ctx; const struct dccg_funcs *funcs; - + int pipe_dppclk_khz[MAX_PIPES]; int ref_dppclk; }; |