diff options
| author |   Fatemeh Darbehani <fatemeh.darbehani@amd.com> | 2018-10-19 10:12:56 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2018-11-05 14:21:44 -0500 |
| commit | ff83a9a0d15d3be46b3288346a1180777f1a4e41 (patch) | |
| tree | 39eabfe257d13a833b91b8bb667d2200864daf1b /drivers/gpu/drm/amd/display/dc | |
| parent | drm/amd/display: remove CRTC_3D_STRUCTURE_V_UPDATE_MODE bit programming. (diff) | |
| download | linux-dev-ff83a9a0d15d3be46b3288346a1180777f1a4e41.tar.xz linux-dev-ff83a9a0d15d3be46b3288346a1180777f1a4e41.zip | |
drm/amd/display: Remove the check to see if pp_display_cfg is changed
[Why]
When going to full-screen mode commit_planes_for_stream tries to decrease
dcf_deep_sleep value, but safe_to_lower is false, so we don't send the new value
to SMU but dc context gets updated.
Later when dc_post_update_surfaces_to_stream tries to lower dcf_ds when
safe_to_lower is true, this check prevents the message from being sent.
[How]
Remove the check that compares new value with what is stored in dc_context.
This check is not necessary as dcn1_update_clocks already checks if the value
is different from the current dcf_dp value.
Signed-off-by: Fatemeh Darbehani <fatemeh.darbehani@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c index 98a1e2c93840..20f531d27e2b 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_clk_mgr.c @@ -57,8 +57,7 @@ void dcn1_pplib_apply_display_requirements( pp_display_cfg->disp_clk_khz = dc->res_pool->clk_mgr->clks.dispclk_khz; dce110_fill_display_configs(context, pp_display_cfg); - if (memcmp(&dc->current_state->pp_display_cfg, pp_display_cfg, sizeof(*pp_display_cfg)) != 0) - dm_pp_apply_display_requirements(dc->ctx, pp_display_cfg); + dm_pp_apply_display_requirements(dc->ctx, pp_display_cfg); } static int dcn1_determine_dppclk_threshold(struct clk_mgr *clk_mgr, struct dc_clocks *new_clocks) |