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authorEvan Quan <evan.quan@amd.com>2019-01-14 15:44:44 +0800
committerAlex Deucher <alexander.deucher@amd.com>2019-01-25 16:15:34 -0500
commit828e37efe802ba8c868922af23099638fde5b7b4 (patch)
tree6860d47f01d20d92cfe804fe970f0c8b61422177 /drivers/gpu/drm/amd/include
parentdrm/amd/powerplay: support retrieving and adjusting SOC clock power levels V2 (diff)
downloadlinux-dev-828e37efe802ba8c868922af23099638fde5b7b4.tar.xz
linux-dev-828e37efe802ba8c868922af23099638fde5b7b4.zip
drm/amd/powerplay: support retrieving and adjusting fclock power levels V2
User can use "pp_dpm_fclk" to retrieve and adjust fclock power levels. V2: expose this interface for Vega20 and later ASICs only Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/include')
-rw-r--r--drivers/gpu/drm/amd/include/kgd_pp_interface.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
index f5ec25a6ab54..f82de14f6560 100644
--- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
+++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
@@ -93,6 +93,7 @@ enum pp_clock_type {
PP_MCLK,
PP_PCIE,
PP_SOCCLK,
+ PP_FCLK,
OD_SCLK,
OD_MCLK,
OD_VDDC_CURVE,