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| author |   Rex Zhu <Rex.Zhu@amd.com> | 2018-01-04 17:08:14 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2018-02-19 14:17:56 -0500 |
| commit | 5d97cf39ff2412a156a0bf0624a9496e4596f608 (patch) | |
| tree | e9d465d11a3bf80620f36a57694aa2278fa3cebf /drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h | |
| parent | drm/amd/pp: Add a new pp feature mask bit for OD feature (diff) | |
| download | linux-dev-5d97cf39ff2412a156a0bf0624a9496e4596f608.tar.xz linux-dev-5d97cf39ff2412a156a0bf0624a9496e4596f608.zip | |
drm/amd/pp: Add and initialize OD_dpm_table for CI/VI.
Add initial infrastructure for manual dpm control.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h index 8d4e9c193b8b..1ce84cc6a7f4 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h @@ -173,9 +173,23 @@ struct smu7_pcie_perf_range { uint16_t min; }; +struct smu7_odn_clock_voltage_dependency_table { + uint32_t count; + phm_ppt_v1_clock_voltage_dependency_record entries[MAX_REGULAR_DPM_NUMBER]; +}; + +struct smu7_odn_dpm_table { + struct phm_odn_clock_levels odn_core_clock_dpm_levels; + struct phm_odn_clock_levels odn_memory_clock_dpm_levels; + struct smu7_odn_clock_voltage_dependency_table vdd_dependency_on_sclk; + struct smu7_odn_clock_voltage_dependency_table vdd_dependency_on_mclk; + uint32_t odn_mclk_min_limit; +}; + struct smu7_hwmgr { struct smu7_dpm_table dpm_table; struct smu7_dpm_table golden_dpm_table; + struct smu7_odn_dpm_table odn_dpm_table; uint32_t voting_rights_clients[8]; uint32_t static_screen_threshold_unit; |