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| author |   Rex Zhu <Rex.Zhu@amd.com> | 2017-05-31 16:58:31 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2017-06-01 16:00:18 -0400 |
| commit | c5b053d2a07b3628ed3a9ccf5082d93762618bf2 (patch) | |
| tree | 6afe840085d4643a9f76ba17c3a3e5fdf91aa61f /drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h | |
| parent | drm/amdgpu: use LRU mapping policy for SDMA engines (diff) | |
| download | linux-dev-c5b053d2a07b3628ed3a9ccf5082d93762618bf2.tar.xz linux-dev-c5b053d2a07b3628ed3a9ccf5082d93762618bf2.zip | |
drm/amd/powerplay: Add floor DCEF for DS on boot.
Use the vbios to look up the default frequencies
for socclk and dcefclk.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h index 1d7dbad66ab3..6e5c5b99593b 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h @@ -185,6 +185,7 @@ struct vega10_vbios_boot_state { uint32_t gfx_clock; uint32_t mem_clock; uint32_t soc_clock; + uint32_t dcef_clock; }; #define DPMTABLE_OD_UPDATE_SCLK 0x00000001 |