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| author |   Kevin Wang <kevin1.wang@amd.com> | 2019-07-12 11:27:50 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-07-12 08:00:10 -0500 |
| commit | 64974ab24908a92b5dfe52e1ace3d67c47d657cb (patch) | |
| tree | 08d0d2567ead455be21e12bea8b23fb33037f75c /drivers/gpu/drm/amd/powerplay/navi10_ppt.c | |
| parent | drm/amd/powerplay: fix smu clock type change miss error (diff) | |
| download | linux-dev-64974ab24908a92b5dfe52e1ace3d67c47d657cb.tar.xz linux-dev-64974ab24908a92b5dfe52e1ace3d67c47d657cb.zip | |
drm/amd/powerplay: add pstate mclk(uclk) support for navi10
add pstate mclk(uclk) support.
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/navi10_ppt.c')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c index 4404528f969a..e25c1e3094ef 100644 --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c @@ -709,7 +709,7 @@ static int navi10_force_clk_levels(struct smu_context *smu, static int navi10_populate_umd_state_clk(struct smu_context *smu) { int ret = 0; - uint32_t min_sclk_freq = 0; + uint32_t min_sclk_freq = 0, min_mclk_freq = 0; ret = smu_get_dpm_freq_range(smu, SMU_SCLK, &min_sclk_freq, NULL); if (ret) @@ -717,6 +717,12 @@ static int navi10_populate_umd_state_clk(struct smu_context *smu) smu->pstate_sclk = min_sclk_freq * 100; + ret = smu_get_dpm_freq_range(smu, SMU_MCLK, &min_mclk_freq, NULL); + if (ret) + return ret; + + smu->pstate_mclk = min_mclk_freq * 100; + return ret; } |