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| author |   Kevin Wang <kevin1.wang@amd.com> | 2019-05-30 10:28:11 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-06-21 18:59:33 -0500 |
| commit | a39bf39816b0d02344fa36e280a52a9b9787bd89 (patch) | |
| tree | 3abceb8cbb010b785cf01c346f7f72eb85981ffb /drivers/gpu/drm/amd/powerplay/navi10_ppt.c | |
| parent | drm/amdgpu: add new navi10 DIDs (diff) | |
| download | linux-dev-a39bf39816b0d02344fa36e280a52a9b9787bd89.tar.xz linux-dev-a39bf39816b0d02344fa36e280a52a9b9787bd89.zip | |
drm/amd/powerplay: use pp_feature_mask to control uclk(mclk) dpm enabled
the uclk dpm feature is not work well on all navi10 asic,
use pp feature mask module parameter to control it.
Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/navi10_ppt.c')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c index 4310f8621061..425523381f62 100644 --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c @@ -315,9 +315,6 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, | FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT) | FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT) | FEATURE_MASK(FEATURE_DPM_LINK_BIT) - | FEATURE_MASK(FEATURE_DPM_UCLK_BIT) - | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT) - | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT) | FEATURE_MASK(FEATURE_GFX_ULV_BIT) | FEATURE_MASK(FEATURE_RSMU_SMN_CG_BIT) | FEATURE_MASK(FEATURE_DS_SOCCLK_BIT) @@ -336,6 +333,11 @@ navi10_get_allowed_feature_mask(struct smu_context *smu, | FEATURE_MASK(FEATURE_FW_DSTATE_BIT) | FEATURE_MASK(FEATURE_ACDC_BIT); + if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT) + | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT) + | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT); + if (adev->pm.pp_feature & PP_GFXOFF_MASK) { *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_SS_BIT) | FEATURE_MASK(FEATURE_GFXOFF_BIT); |