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authorJosip Pavic <Josip.Pavic@amd.com>2020-02-21 12:26:19 -0500
committerAlex Deucher <alexander.deucher@amd.com>2020-03-05 09:42:08 -0500
commita0275dfc82c9034eefbeffd556cca6dd239d7925 (patch)
tree477a19cac18edb21a909431e10c1b327737b7bf6 /drivers/gpu/drm/amd/powerplay/smu_v12_0.c
parentdrm/amd/display: Clear link settings on MST disable connector (diff)
downloadlinux-dev-a0275dfc82c9034eefbeffd556cca6dd239d7925.tar.xz
linux-dev-a0275dfc82c9034eefbeffd556cca6dd239d7925.zip
drm/amd/display: fix dcc swath size calculations on dcn1
[Why] Swath sizes are being calculated incorrectly. The horizontal swath size should be the product of block height, viewport width, and bytes per element, but the calculation uses viewport height instead of width. The vertical swath size is similarly incorrectly calculated. The effect of this is that we report the wrong DCC caps. [How] Use viewport width in the horizontal swath size calculation and viewport height in the vertical swath size calculation. Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/smu_v12_0.c')
0 files changed, 0 insertions, 0 deletions