diff options
| author |   Dmitry Osipenko <digetx@gmail.com> | 2021-10-03 02:34:43 +0300 |
|---|---|---|
| committer |   Robert Foss <robert.foss@linaro.org> | 2021-10-19 11:39:57 +0200 |
| commit | 45a44b01faa6ef92788b2067631deb486cef8a4d (patch) | |
| tree | f52254dce2052e7bf624f470d77c1433eb87a454 /drivers/gpu/drm/bridge | |
| parent | drm/gma500: Rename struct gtt_range to struct psb_gem_object (diff) | |
| download | linux-dev-45a44b01faa6ef92788b2067631deb486cef8a4d.tar.xz linux-dev-45a44b01faa6ef92788b2067631deb486cef8a4d.zip | |
drm/bridge: tc358768: Enable reference clock
The driver assumes that reference clock is always-enabled, but this is
hardware-dependent and not true for ASUS Transformer TF700T. Make driver
enable / disable the reference clock.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # Asus TF700T
Tested-by: Maxim Schwalm <maxim.schwalm@gmail.com> #TF700T
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20211002233447.1105-2-digetx@gmail.com
Diffstat (limited to 'drivers/gpu/drm/bridge')
| -rw-r--r-- | drivers/gpu/drm/bridge/tc358768.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index a3db532bbdd1..18ae6605a803 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -237,6 +237,10 @@ static void tc358768_hw_enable(struct tc358768_priv *priv) if (priv->enabled) return; + ret = clk_prepare_enable(priv->refclk); + if (ret < 0) + dev_err(priv->dev, "error enabling refclk (%d)\n", ret); + ret = regulator_bulk_enable(ARRAY_SIZE(priv->supplies), priv->supplies); if (ret < 0) dev_err(priv->dev, "error enabling regulators (%d)\n", ret); @@ -274,6 +278,8 @@ static void tc358768_hw_disable(struct tc358768_priv *priv) if (ret < 0) dev_err(priv->dev, "error disabling regulators (%d)\n", ret); + clk_disable_unprepare(priv->refclk); + priv->enabled = false; } |