diff options
author | Dave Airlie <airlied@redhat.com> | 2016-02-05 14:44:16 +1000 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2016-02-05 14:44:16 +1000 |
commit | c6b431cc595b714c631866087b00dc2db9c5f450 (patch) | |
tree | 6522a38719fdbebd52884f56b73667e588d2f506 /drivers/gpu/drm/i2c/adv7511.h | |
parent | Merge tag 'drm-intel-fixes-2016-02-04' of git://anongit.freedesktop.org/drm-intel into drm-fixes (diff) | |
parent | drm: adv7511: it's HPD, not HDP (diff) | |
download | linux-dev-c6b431cc595b714c631866087b00dc2db9c5f450.tar.xz linux-dev-c6b431cc595b714c631866087b00dc2db9c5f450.zip |
Merge branch 'drm/adv7511' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux into drm-fixes
misc adv7511 edid reading fixes.
* 'drm/adv7511' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
drm: adv7511: it's HPD, not HDP
drm: adv7511: mark ADV7511_REG_EDID_READ_CTRL volatile
drm: adv7511: really enable interrupts for EDID detection
Diffstat (limited to 'drivers/gpu/drm/i2c/adv7511.h')
-rw-r--r-- | drivers/gpu/drm/i2c/adv7511.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i2c/adv7511.h b/drivers/gpu/drm/i2c/adv7511.h index 6599ed538426..38515b30cedf 100644 --- a/drivers/gpu/drm/i2c/adv7511.h +++ b/drivers/gpu/drm/i2c/adv7511.h @@ -90,7 +90,7 @@ #define ADV7511_CSC_ENABLE BIT(7) #define ADV7511_CSC_UPDATE_MODE BIT(5) -#define ADV7511_INT0_HDP BIT(7) +#define ADV7511_INT0_HPD BIT(7) #define ADV7511_INT0_VSYNC BIT(5) #define ADV7511_INT0_AUDIO_FIFO_FULL BIT(4) #define ADV7511_INT0_EDID_READY BIT(2) @@ -157,11 +157,11 @@ #define ADV7511_PACKET_ENABLE_SPARE2 BIT(1) #define ADV7511_PACKET_ENABLE_SPARE1 BIT(0) -#define ADV7511_REG_POWER2_HDP_SRC_MASK 0xc0 -#define ADV7511_REG_POWER2_HDP_SRC_BOTH 0x00 -#define ADV7511_REG_POWER2_HDP_SRC_HDP 0x40 -#define ADV7511_REG_POWER2_HDP_SRC_CEC 0x80 -#define ADV7511_REG_POWER2_HDP_SRC_NONE 0xc0 +#define ADV7511_REG_POWER2_HPD_SRC_MASK 0xc0 +#define ADV7511_REG_POWER2_HPD_SRC_BOTH 0x00 +#define ADV7511_REG_POWER2_HPD_SRC_HPD 0x40 +#define ADV7511_REG_POWER2_HPD_SRC_CEC 0x80 +#define ADV7511_REG_POWER2_HPD_SRC_NONE 0xc0 #define ADV7511_REG_POWER2_TDMS_ENABLE BIT(4) #define ADV7511_REG_POWER2_GATE_INPUT_CLK BIT(0) |