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| author |   Imre Deak <imre.deak@intel.com> | 2020-02-26 22:34:48 +0200 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2020-03-02 19:36:21 +0200 |
| commit | 45e4728b87ad03b3f9a0babe04cadef90c63291d (patch) | |
| tree | 77dcf4d150a2270a6158e94ce72bb0dcb3e9d38e /drivers/gpu/drm/i915/display/intel_ddi.h | |
| parent | drm/i915/hsw: Use the DPLL ID when calculating DPLL clock (diff) | |
| download | linux-dev-45e4728b87ad03b3f9a0babe04cadef90c63291d.tar.xz linux-dev-45e4728b87ad03b3f9a0babe04cadef90c63291d.zip | |
drm/i915: Move DPLL frequency calculation to intel_dpll_mgr.c
Move all the DPLL params->DPLL frequency conversion functions to
intel_dpll_mgr.c where the corresponding inverse conversions are.
The GEN11+ TBT PLL outputs multiple frequencies and for selecting the
one in use we need to check the DDI CLK mux. As part of the DDI clock
logic this selection is kept in intel_ddi.c.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200226203455.23032-7-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_ddi.h')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_ddi.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h index 974d3dfef29f..55fd72b901fe 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.h +++ b/drivers/gpu/drm/i915/display/intel_ddi.h @@ -45,7 +45,5 @@ u8 intel_ddi_dp_pre_emphasis_max(struct intel_encoder *encoder, int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder, bool enable); void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder); -int cnl_calc_wrpll_link(struct drm_i915_private *dev_priv, - struct intel_dpll_hw_state *state); #endif /* __INTEL_DDI_H__ */ |