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| author |   Dave Airlie <airlied@redhat.com> | 2019-11-15 12:16:43 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2019-11-15 12:16:43 +1000 |
| commit | 2d0720f5a4fc2aa5ae92f21fc113d7626b5a3c9f (patch) | |
| tree | 62d241d86b32eede235b84d7e5a67e79215c800f /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | Backmerge i915 security patches from commit 'ea0b163b13ff' into drm-next (diff) | |
| parent | drm/i915: Split a setting of MSA to MST and SST (diff) | |
| download | linux-dev-2d0720f5a4fc2aa5ae92f21fc113d7626b5a3c9f.tar.xz linux-dev-2d0720f5a4fc2aa5ae92f21fc113d7626b5a3c9f.zip | |
Merge tag 'drm-intel-next-fixes-2019-11-14' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
- PMU "Frequency" is reported as accumulated cycles
- Avoid OOPS in dumb_create IOCTL when no CRTCs
- Mitigation for userptr put_pages deadlock with trylock_page
- Fix to avoid freeing heartbeat request too early
- Fix LRC coherency issue
- Fix Bugzilla #112212: Avoid screen corruption on MST
- Error path fix to unlock context on failed context VM SETPARAM
- Always consider holding preemption a privileged op in perf/OA
- Preload LUTs if the hw isn't currently using them to avoid color flash on VLV/CHV
- Protect context while grabbing its name for the request
- Don't resize aliasing ppGTT size
- Smaller fixes picked by tooling
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191114085213.GA6440@jlahtine-desk.ger.corp.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 9ae5b8b6bbbc..03d1cba0b696 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -331,6 +331,8 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder, ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); intel_ddi_enable_pipe_clock(pipe_config); + + intel_ddi_set_dp_msa(pipe_config, conn_state); } static void intel_mst_enable_dp(struct intel_encoder *encoder, |