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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-02-25 18:12:25 +0200 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-03-08 18:36:08 +0200 |
commit | 7d3d8f853cbe981ffe98c71328d67d3b3d16a79b (patch) | |
tree | 2c7abbaf453083a264e86eeed98ff58f448b1e85 /drivers/gpu/drm/i915/display/intel_dpll_mgr.c | |
parent | drm/i915: Call primary encoder's .get_config() from MST .get_config() (diff) | |
download | linux-dev-7d3d8f853cbe981ffe98c71328d67d3b3d16a79b.tar.xz linux-dev-7d3d8f853cbe981ffe98c71328d67d3b3d16a79b.zip |
drm/i915: Do intel_dpll_readout_hw_state() after encoder readout
The clock readout for DDI encoders needs to moved into the encoders.
To that end intel_dpll_readout_hw_state() needs to happen after
the encoder readout as otherwise it can't correctly populate
the PLL crtc_mask/active_mask bitmasks.
v2: Populate DPLL ref clocks before the encoder->get_config()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210225161225.30746-1-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dpll_mgr.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index 529b1d569af2..ac6460962e29 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -4612,12 +4612,15 @@ static void readout_dpll_hw_state(struct drm_i915_private *i915, pll->info->name, pll->state.crtc_mask, pll->on); } -void intel_dpll_readout_hw_state(struct drm_i915_private *i915) +void intel_dpll_update_ref_clks(struct drm_i915_private *i915) { - int i; - if (i915->dpll.mgr && i915->dpll.mgr->update_ref_clks) i915->dpll.mgr->update_ref_clks(i915); +} + +void intel_dpll_readout_hw_state(struct drm_i915_private *i915) +{ + int i; for (i = 0; i < i915->dpll.num_shared_dpll; i++) readout_dpll_hw_state(i915, &i915->dpll.shared_dplls[i]); |