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| author |   Matt Roper <matthew.d.roper@intel.com> | 2021-07-14 17:54:25 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2021-07-14 17:55:21 -0700 |
| commit | d6e6ac294d91563131265fdf44537aeac2984c21 (patch) | |
| tree | 2dc8a17fc2fc57688d3feb9cad5ad2f731f13e13 /drivers/gpu/drm/i915/display/intel_dpll_mgr.c | |
| parent | drm/i915/gtt: drop the page table optimisation (diff) | |
| parent | drm/i915/icl: Drop workarounds that only apply to pre-production steppings (diff) | |
| download | linux-dev-d6e6ac294d91563131265fdf44537aeac2984c21.tar.xz linux-dev-d6e6ac294d91563131265fdf44537aeac2984c21.zip | |
Merge branch 'topic/revid_steppings' into drm-intel-gt-next
The switch from old old IS_FOO_REVID() macros to the new table-based
IS_FOO_{GT,DISP}_STEP() macros is needed on both drm-intel-next (for
display-based DMC matching) and drm-intel-gt-next (for workaround
guards). To avoid conflicts, we'll apply the patches to a topic branch
and merge it to both intel branches to ensure the transition to the
new macros is clean.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dpll_mgr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index 882bfd499e55..dfc31b682848 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -2674,7 +2674,7 @@ static bool ehl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915) { return ((IS_PLATFORM(i915, INTEL_ELKHARTLAKE) && - IS_JSL_EHL_REVID(i915, EHL_REVID_B0, REVID_FOREVER)) || + IS_JSL_EHL_DISPLAY_STEP(i915, STEP_B0, STEP_FOREVER)) || IS_TIGERLAKE(i915) || IS_ALDERLAKE_P(i915)) && i915->dpll.ref_clks.nssc == 38400; } |