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| author |   Bhaskar Chowdhury <unixbhaskar@gmail.com> | 2021-03-19 10:07:01 +0530 |
|---|---|---|
| committer |   Jani Nikula <jani.nikula@intel.com> | 2021-03-19 09:56:44 +0200 |
| commit | e5dd4e2181f70129f38af1ec36902608e681f84d (patch) | |
| tree | 4f21521211c4ddef62ddab1ad037c54caf7d4f4a /drivers/gpu/drm/i915/display/intel_dpll_mgr.c | |
| parent | drm/i915/display: Remove FRL related code from disable DP sequence for older platforms (diff) | |
| download | linux-dev-e5dd4e2181f70129f38af1ec36902608e681f84d.tar.xz linux-dev-e5dd4e2181f70129f38af1ec36902608e681f84d.zip | |
drm/i915/display: Fix a typo
s/nothign/nothing/
Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210319043701.14105-1-unixbhaskar@gmail.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dpll_mgr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index 22ee8e13b518..756c53ac6ec2 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -4199,7 +4199,7 @@ static void icl_pll_disable(struct drm_i915_private *dev_priv, /* * DVFS pre sequence would be here, but in our driver the cdclk code * paths should already be setting the appropriate voltage, hence we do - * nothign here. + * nothing here. */ val = intel_de_read(dev_priv, enable_reg); |