diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-11-10 01:12:36 +0200 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-11-16 21:38:55 +0200 |
commit | fdbc5d682e75ed53e923627d7aa79ff0cb134d79 (patch) | |
tree | 6044d1433a7f7e213725362969ed79c401314c0a /drivers/gpu/drm/i915/display/intel_dpll_mgr.c | |
parent | drm/i915: Remove skl_adjusted_plane_pixel_rate() (diff) | |
download | linux-dev-fdbc5d682e75ed53e923627d7aa79ff0cb134d79.tar.xz linux-dev-fdbc5d682e75ed53e923627d7aa79ff0cb134d79.zip |
drm/i915: Introduce intel_dpll_get_hw_state()
Add a wrapper for the pll .get_hw_state() vfunc. Makes life
a bit less miserable when you don't have to worry where the
function pointer is stored.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201109231239.17002-1-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dpll_mgr.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index a95e6a2ac698..1604c20bac33 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -141,7 +141,7 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv, "asserting DPLL %s with no DPLL\n", onoff(state))) return; - cur_state = pll->info->funcs->get_hw_state(dev_priv, pll, &hw_state); + cur_state = intel_dpll_get_hw_state(dev_priv, pll, &hw_state); I915_STATE_WARN(cur_state != state, "%s assertion failure (expected %s, current %s)\n", pll->info->name, onoff(state), onoff(cur_state)); @@ -4527,13 +4527,27 @@ int intel_dpll_get_freq(struct drm_i915_private *i915, return pll->info->funcs->get_freq(i915, pll); } +/** + * intel_dpll_get_hw_state - readout the DPLL's hardware state + * @i915: i915 device + * @pll: DPLL for which to calculate the output frequency + * @hw_state: DPLL's hardware state + * + * Read out @pll's hardware state into @hw_state. + */ +bool intel_dpll_get_hw_state(struct drm_i915_private *i915, + struct intel_shared_dpll *pll, + struct intel_dpll_hw_state *hw_state) +{ + return pll->info->funcs->get_hw_state(i915, pll, hw_state); +} + static void readout_dpll_hw_state(struct drm_i915_private *i915, struct intel_shared_dpll *pll) { struct intel_crtc *crtc; - pll->on = pll->info->funcs->get_hw_state(i915, pll, - &pll->state.hw_state); + pll->on = intel_dpll_get_hw_state(i915, pll, &pll->state.hw_state); if (IS_JSL_EHL(i915) && pll->on && pll->info->id == DPLL_ID_EHL_DPLL4) { |