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authorVille Syrjälä <ville.syrjala@linux.intel.com>2020-11-10 01:12:38 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2020-11-16 21:42:55 +0200
commit3749de07bb11b1cc5ad7ec993d879446adae9505 (patch)
tree93174c7074aea57ad7510e8676a21d9ef9a329c6 /drivers/gpu/drm/i915/display/intel_dpll_mgr.h
parentdrm/i915: Move intel_dpll_get_hw_state() into the hsw+ platform specific functions (diff)
downloadlinux-dev-3749de07bb11b1cc5ad7ec993d879446adae9505.tar.xz
linux-dev-3749de07bb11b1cc5ad7ec993d879446adae9505.zip
drm/i915: Use actual readout results for .get_freq()
Currently the DPLL .get_freq() uses pll->state.hw_state which is not the thing we actually read out (except during driver load/resume). Outside of that pll->state.hw_state is just the thing we committed last time around. During state check we just read the thing into crtc_state->dpll_hw_state, so that is what we should use for calculating the DPLL output frequency. I think we used to do this so that the results of the readout were actually used, but somehow it got changed when the .get_freq() refactoring happened. Cc: Imre Deak <imre.deak@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201109231239.17002-3-ville.syrjala@linux.intel.com Reviewed-by: Imre Deak <imre.deak@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dpll_mgr.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_dpll_mgr.h8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index 4357f92eafd6..2eb7618ef957 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -300,10 +300,11 @@ struct intel_shared_dpll_funcs {
* @get_freq:
*
* Hook for calculating the pll's output frequency based on its
- * current state.
+ * passed in state.
*/
int (*get_freq)(struct drm_i915_private *i915,
- const struct intel_shared_dpll *pll);
+ const struct intel_shared_dpll *pll,
+ const struct intel_dpll_hw_state *pll_state);
};
/**
@@ -399,7 +400,8 @@ void intel_update_active_dpll(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_encoder *encoder);
int intel_dpll_get_freq(struct drm_i915_private *i915,
- const struct intel_shared_dpll *pll);
+ const struct intel_shared_dpll *pll,
+ const struct intel_dpll_hw_state *pll_state);
bool intel_dpll_get_hw_state(struct drm_i915_private *i915,
struct intel_shared_dpll *pll,
struct intel_dpll_hw_state *hw_state);