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author | Matt Roper <matthew.d.roper@intel.com> | 2021-07-23 10:42:36 -0700 |
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committer | Matt Roper <matthew.d.roper@intel.com> | 2021-07-29 09:32:48 -0700 |
commit | a6a128116e55970a2df9f39e31e3c8373c0ff558 (patch) | |
tree | e57bde2bbcc28d2407c98e364c2ab85206d888ca /drivers/gpu/drm/i915/display/intel_snps_phy.h | |
parent | drm/i915/dg2: Update modeset sequences (diff) | |
download | linux-dev-a6a128116e55970a2df9f39e31e3c8373c0ff558.tar.xz linux-dev-a6a128116e55970a2df9f39e31e3c8373c0ff558.zip |
drm/i915/dg2: Wait for SNPS PHY calibration during display init
Initialization of the PHY is handled by the hardware/firmware, but the
driver should wait up to 25ms for the PHY to report that its calibration
has completed.
Bspec: 49189
Bspec: 50107
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210723174239.1551352-28-matthew.d.roper@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_snps_phy.h')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_snps_phy.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.h b/drivers/gpu/drm/i915/display/intel_snps_phy.h index 3ce92d424f66..6aa33ff729ec 100644 --- a/drivers/gpu/drm/i915/display/intel_snps_phy.h +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.h @@ -8,10 +8,13 @@ #include <linux/types.h> +struct drm_i915_private; struct intel_encoder; struct intel_crtc_state; struct intel_mpllb_state; +void intel_snps_phy_wait_for_calibration(struct drm_i915_private *dev_priv); + int intel_mpllb_calc_state(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder); void intel_mpllb_enable(struct intel_encoder *encoder, |