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authorClinton A Taylor <clinton.a.taylor@intel.com>2019-09-26 14:06:56 -0700
committerJosé Roberto de Souza <jose.souza@intel.com>2019-09-27 10:40:17 -0700
commit3b51be4e4061bd5e0f1b73f56cfecaa879c76d51 (patch)
treed6e24340569d6977ab4000d9eafadd55e293b45a /drivers/gpu/drm/i915/display/intel_tc.c
parentdrm/i915/dmc: Update ICL DMC version to v1.09 (diff)
downloadlinux-dev-3b51be4e4061bd5e0f1b73f56cfecaa879c76d51.tar.xz
linux-dev-3b51be4e4061bd5e0f1b73f56cfecaa879c76d51.zip
drm/i915/tc: Update DP_MODE programming
BSpec was updated(r146548) with a new MG_DP_MODE Programming table, now taking in consideration the pin assignment and allowing us to optimize power by shutting down available but not needed lanes. It was tested on ICL and TGL, with adaptors that used pin assignment C and B, reversing the connector and going to different modes testing the not needed lane shutdown. v5: Using crtc_state->lane_count instead of dp.lane_count BSpec: 21735 BSpec: 49292 Cc: Imre Deak <imre.deak@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Clinton A Taylor <clinton.a.taylor@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190926210659.56317-1-jose.souza@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_tc.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_tc.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index f923f9cbd33c..7773169b7331 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -67,6 +67,21 @@ u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
return lane_mask >> DP_LANE_ASSIGNMENT_SHIFT(dig_port->tc_phy_fia_idx);
}
+u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port)
+{
+ struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ struct intel_uncore *uncore = &i915->uncore;
+ u32 pin_mask;
+
+ pin_mask = intel_uncore_read(uncore,
+ PORT_TX_DFLEXPA1(dig_port->tc_phy_fia));
+
+ WARN_ON(pin_mask == 0xffffffff);
+
+ return (pin_mask & DP_PIN_ASSIGNMENT_MASK(dig_port->tc_phy_fia_idx)) >>
+ DP_PIN_ASSIGNMENT_SHIFT(dig_port->tc_phy_fia_idx);
+}
+
int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);