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author | Imre Deak <imre.deak@intel.com> | 2021-09-21 03:23:03 +0300 |
---|---|---|
committer | Imre Deak <imre.deak@intel.com> | 2021-09-29 23:57:25 +0300 |
commit | 62e1e308ffd7a867ef82375f3cff7f8789ce6721 (patch) | |
tree | e1737c155cb8d7db94ebd6a8429a36acdac8dc74 /drivers/gpu/drm/i915/display/intel_tc.c | |
parent | drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode (diff) | |
download | linux-dev-62e1e308ffd7a867ef82375f3cff7f8789ce6721.tar.xz linux-dev-62e1e308ffd7a867ef82375f3cff7f8789ce6721.zip |
drm/i915/tc: Remove waiting for PHY complete during releasing ownership
Waiting for the PHY complete flag to clear when releasing the PHY
ownership was add in
commit ddec362724f9 ("drm/i915: Wait for TypeC PHY complete flag to clear in safe mode")
This isn't required by the spec, the vague idea was to make the
handshake with the firmware more robust, without actual evidence for
when it would be needed. Checking this again, the flag doesn't clear on
ICL until after the PHY's PLL is disabled and the flag is permanently
set on ADL-P. To avoid the spurious timeout messages in dmesg, just
remove this wait.
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210921002313.1132357-4-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_tc.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/intel_tc.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c index 7dc3696085c7..0d3555437b0b 100644 --- a/drivers/gpu/drm/i915/display/intel_tc.c +++ b/drivers/gpu/drm/i915/display/intel_tc.c @@ -339,11 +339,6 @@ static bool icl_tc_phy_take_ownership(struct intel_digital_port *dig_port, intel_uncore_write(uncore, PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val); - if (!take && wait_for(!tc_phy_status_complete(dig_port), 10)) - drm_dbg_kms(&i915->drm, - "Port %s: PHY complete clear timed out\n", - dig_port->tc_port_name); - return true; } |