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authorJani Nikula <jani.nikula@intel.com>2019-12-10 12:50:48 +0200
committerJani Nikula <jani.nikula@intel.com>2019-12-11 07:39:53 +0200
commit7a7b5be96fb66febb50ef001c0e5d20d55c0c34b (patch)
tree4bf12f8d2b2005ae289e85abbdd03a54ffcd3e6f /drivers/gpu/drm/i915/display/intel_vdsc.c
parentdrm/i915/bios: add support for querying DSC details for encoder (diff)
downloadlinux-dev-7a7b5be96fb66febb50ef001c0e5d20d55c0c34b.tar.xz
linux-dev-7a7b5be96fb66febb50ef001c0e5d20d55c0c34b.zip
drm/i915/dsc: move DP specific compute params to intel_dp.c
Turns out future DSI specific parameters aren't workable with the approach of having the encoder specific functions in intel_vdsc.c. Make intel_dsc_compute_params() a helper that does the encoder independent parts, and have encoder code call it. Move intel_dsc_dp_compute_params() to intel_dp.c as intel_dp_dsc_compute_params(). No functional changes. v2: Rename pipe_config to crtc_state while at it. Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/620688ec302f7f49cc539c6c1653bfaf6092fce0.1575974743.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_vdsc.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_vdsc.c48
1 files changed, 1 insertions, 47 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index b23ba8d108db..834d665a47d2 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -30,8 +30,6 @@ enum COLUMN_INDEX_BPC {
MAX_COLUMN_INDEX
};
-#define DSC_SUPPORTED_VERSION_MIN 1
-
/* From DSC_v1.11 spec, rc_parameter_Set syntax element typically constant */
static const u16 rc_buf_thresh[] = {
896, 1792, 2688, 3584, 4480, 5376, 6272, 6720, 7168, 7616,
@@ -335,45 +333,6 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
return &rc_parameters[row_index][column_index];
}
-/* Values filled from DSC Sink DPCD */
-static int intel_dsc_dp_compute_params(struct intel_encoder *encoder,
- struct intel_crtc_state *pipe_config)
-{
- struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
- struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
- u8 line_buf_depth;
-
- vdsc_cfg->dsc_version_major =
- (intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
- DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
- vdsc_cfg->dsc_version_minor =
- min(DSC_SUPPORTED_VERSION_MIN,
- (intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
- DP_DSC_MINOR_MASK) >> DP_DSC_MINOR_SHIFT);
-
- vdsc_cfg->convert_rgb = intel_dp->dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
- DP_DSC_RGB;
-
- line_buf_depth = drm_dp_dsc_sink_line_buf_depth(intel_dp->dsc_dpcd);
- if (!line_buf_depth) {
- DRM_DEBUG_KMS("DSC Sink Line Buffer Depth invalid\n");
- return -EINVAL;
- }
-
- if (vdsc_cfg->dsc_version_minor == 2)
- vdsc_cfg->line_buf_depth = (line_buf_depth == DSC_1_2_MAX_LINEBUF_DEPTH_BITS) ?
- DSC_1_2_MAX_LINEBUF_DEPTH_VAL : line_buf_depth;
- else
- vdsc_cfg->line_buf_depth = (line_buf_depth > DSC_1_1_MAX_LINEBUF_DEPTH_BITS) ?
- DSC_1_1_MAX_LINEBUF_DEPTH_BITS : line_buf_depth;
-
- vdsc_cfg->block_pred_enable =
- intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
- DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
-
- return 0;
-}
-
int intel_dsc_compute_params(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
@@ -381,7 +340,6 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
const struct rc_parameters *rc_params;
u8 i = 0;
- int ret;
vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
@@ -470,11 +428,7 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
vdsc_cfg->initial_scale_value = (vdsc_cfg->rc_model_size << 3) /
(vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset);
- ret = intel_dsc_dp_compute_params(encoder, pipe_config);
- if (ret)
- return ret;
-
- return drm_dsc_compute_rc_parameters(vdsc_cfg);
+ return 0;
}
enum intel_display_power_domain