diff options
| author |   Vandita Kulkarni <vandita.kulkarni@intel.com> | 2019-07-30 13:06:48 +0530 |
|---|---|---|
| committer |   Uma Shankar <uma.shankar@intel.com> | 2019-08-08 18:37:52 +0530 |
| commit | 32d38e6cf007dcb298f4d66c9fd51fab0fd26c5e (patch) | |
| tree | d9bba213607361fc2287229a3930d0201888fc6f /drivers/gpu/drm/i915/display | |
| parent | drm/i915/tgl: Add mipi dsi support for TGL (diff) | |
| download | linux-dev-32d38e6cf007dcb298f4d66c9fd51fab0fd26c5e.tar.xz linux-dev-32d38e6cf007dcb298f4d66c9fd51fab0fd26c5e.zip | |
drm/i915/tgl/dsi: Enable blanking packets during BLLP for video mode
Blanking packet bit will control whether the transcoder allows the link
to enter the LP state during BLLP regions (assuming there is enough time),
or whether it will keep the link in the HS state with a Blanking Packet
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190730073648.5157-7-vandita.kulkarni@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display')
| -rw-r--r-- | drivers/gpu/drm/i915/display/icl_dsi.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index eaf2779b89b8..ae33639d48ba 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -685,6 +685,11 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, break; } + if (INTEL_GEN(dev_priv) >= 12) { + if (is_vid_mode(intel_dsi)) + tmp |= BLANKING_PACKET_ENABLE; + } + /* program DSI operation mode */ if (is_vid_mode(intel_dsi)) { tmp &= ~OP_MODE_MASK; |