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| author |   Matthew Brost <matthew.brost@intel.com> | 2021-07-21 14:50:55 -0700 |
|---|---|---|
| committer |   John Harrison <John.C.Harrison@Intel.com> | 2021-07-22 10:07:19 -0700 |
| commit | 38d5ec43063c5908d1cda4e7eb24330405ccdb6f (patch) | |
| tree | 2d268227a0c616f9253d2bd67e907e128b81284e /drivers/gpu/drm/i915/gem/i915_gem_context.c | |
| parent | drm/i915: Disable preempt busywait when using GuC scheduling (diff) | |
| download | linux-dev-38d5ec43063c5908d1cda4e7eb24330405ccdb6f.tar.xz linux-dev-38d5ec43063c5908d1cda4e7eb24330405ccdb6f.zip | |
drm/i915/guc: Ensure request ordering via completion fences
If two requests are on the same ring, they are explicitly ordered by the
HW. So, a submission fence is sufficient to ensure ordering when using
the new GuC submission interface. Conversely, if two requests share a
timeline and are on the same physical engine but different context this
doesn't ensure ordering on the new GuC submission interface. So, a
completion fence needs to be used to ensure ordering.
v2:
(Daniele)
- Don't delete spin lock
v3:
(Daniele)
- Delete forward dec
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210721215101.139794-13-matthew.brost@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/gem/i915_gem_context.c')
0 files changed, 0 insertions, 0 deletions